Piya Pal

 

Ph.D. Candidate
DSP Group
Dept. of Electrical Engineering
California Institute of Technology

Advisor : Prof. P. P. Vaidyanathan

About Me

I am a graduate student in the department of Electrical Engineering at Caltech, working in the DSP group headed by Prof. P. P. Vaidyanathan. I was born and brought up in the city of Calcutta (currently known as Kolkata) in West Bengal, India. I graduated from Indian Institute of Technology, Kharagpur in 2007, with a B. Tech in Electronics and Electrical Communication Engineering. In September 2007, I joined the PhD program in the Electrical Engineering department at Caltech, funded by an Atwood Fellowship. I am currently pursuing my doctoral research under the guidance of Prof. P. P. Vaidyanathan. I spent the summer of 2012 (June-October) at Microsoft Research, Redmond, as an intern working with Dr. Henrique Malvar. I expect to graduate in June 2013.

Contact

1200 E. California Blvd
Mail Code: EE 136-93
Pasadena, CA 91125
Tel: (626) 379 0118
Email: piyapal@caltech.edu

News

  • 02/2013: Paper titled "Correlation-Aware Sparse Support Recovery : Gaussian Sources" accepted at ICASSP , 2013.
  • Winner of Everhart Lecture Series 2013, California Institute of Technology (one of three winners selected across all disciplines).
  • Seminar at IIT Kharagpur (January 15, 2013).
  • Seminar at IIT Madras (January 7, 2013).
  • Seminar at IIT Bombay (January 4, 2013).
  • Seminar at IISC, Bangalore (January 3, 2013).
  • Invited to be on Review Committee of ICASSP, 2013.
  • 06/2012 - 09/2012: Internship at Microsoft Research, Redmond under Dr. Henrique Malvar.
  • 11/2011: Best Student Paper Award (3rd Position) at Asilomar Conference on Signals, Systems and Computers, 2011.
  • 01/1011: Best Student Paper Award, IEEE DSP Workshop, 2011.